Puzzle #1 – Solution
May 23, 2007The key observation to the solution of this puzzle is to note that the outputs of components can be connected together given than only one drives a non high-Z value. If you realized that 90% of the way to solving this puzzle is behind you.
The second step is to realize a “NOT” gate using both the “X” and “Y” components. When you know how to do that an “OR” and an “AND” gate realization are quite simple.
The figure below sums up the construction of “NOT”, “OR” and “AND gates from various instances of “X” and “Y”.
The next step is quite straightforward. We combine the gates we constructed and make an “XOR” gate as follows:
This is by no means the most efficient solution in terms of minimum “X” and “Y” components.
Adventures in ASIC Digital Design 
why not generate
A'(Y)B’
A(X)B’
A'(X)B
A(Y)B
and then wired-OR their output….
Or,
A'(X)B
A(X)B’
(A(X)B)’
A(Y)B
and then wire OR the outputs
OOPS ! Earlier solution will not work as it will give an output of ‘X’ for A=0,B=1 and A=1,B=0 conditions. Aniruddha’s solution is correct.
except that you need to build a 3-input and gates
I guess all these solutions will work only if z input to X and Y give Z ouput 🙂 . I suppose that should be assumed !
Hi Nir,
Really appreciate your blog. Recently started reading while preparing for interview